Brian Wang TERAFAB project, which will be done jointly by @SpaceX and @Tesla. The goal is to produce over a TERAWATT of compute per year (logic, memory & packaging) with ~80% for space and ~20% for the ground. The goal is extreme vertical integration to produce custom AI chips (logic, memory, and advanced packaging) at massive scale: ~1 terawatt (TW) of annual compute capacity — roughly 50–100× current global AI chip output combined. Roughly 80% of output targets space-based orbital compute (solar-powered satellites with no day/night cycle), 20% for Earth use (Optimus robots, robotaxis, FSD, xAI training). It starts with an “advanced technology fab” near Giga Texas for rapid iteration, with the full mega-scale facility to follow. Tesla and Elon have engineering control of the Samsung semiconductor fabrication line in Texas. The Recursive Loop on Chip Masks A rapid iteration loop for chip design will accelerate the work on AI5, AI6, D3 and other chips. Even if initially those chips are made by TSMC and Samsung. Traditional semiconductor iteration is slow and fragmented Design chip → Order photomasks from specialized vendors (long lead times) → Ship masks to a foundry (TSMC) → Fabricate wafers → Package/test → Ship results back for redesign. Each cycle takes months, with high cost and geopolitical risk. Terafab flips this into a closed-loop, single-building system On-site photomask (reticle) manufacturing equipment. Full wafer fabrication (targeting leading-edge nodes, starting at 2 nm-class). Immediate on-site testing + advanced packaging (logic + memory integrated). Use test results to redesign → fabricate improved masks → produce/test new chips — all without leaving the building. Formal announcement of the TERAFAB project, which will be done jointly by @SpaceX and @Tesla, tonight around 8pm CT. Livestream on 𝕏. The goal is to produce over a TERAWATT of compute per year (logic, memory & packaging) with ~80% for space and ~20% for the ground.